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EDA/CAD Engineer
<p style="min-height:1.5em">At <strong>Kandou</strong>, we are redefining the economics of AI infrastructure. Our mission is to <strong>democratise AI by significantly reducing the Total Cost of Ownership (TCO) </strong>of hardware systems — a critical barrier to scalable adoption.</p><p style="min-height:1.5em">Our proprietary <strong>MIMO-over-copper technology </strong>powers a <strong>high-performance, chiplet-based AI memory fabric </strong>that is both <strong>scalable and energy-efficient</strong>. Unlike traditional interconnects, our solution <strong>reduces power consumption significantly </strong>while preserving <strong>high bandwidth and ultra-low latency </strong>— unlocking unprecedented efficiency for AI training and inference at scale.</p><p style="min-height:1.5em">Kandou’s architecture is not just an incremental improvement — it’s a <strong>foundational shift </strong>in how AI hardware is built for the future.</p><p style="min-height:1.5em">We are actively seeking an <strong>EDA/CAD Engineer, based either in UK (Cambridge or Reading), Switzerland (St-Sulpice), or India (Hyderabad or Bangalore)</strong></p><p style="min-height:1.5em"><strong>Department: </strong>RnD</p><p style="min-height:1.5em"><strong>Key Responsibilities</strong></p><ul style="min-height:1.5em"><li><p style="min-height:1.5em">Manage and maintain an integrated analog/digital EDA environment, including installation, configuration, and support of tools such as Cadence Virtuoso, Synopsys platforms, and Siemens Calibre/AFS.</p></li><li><p style="min-height:1.5em">Flow development & automation: design, automate, and validate robust CAD flows for simulation, physical verification, parasitic extraction, and reliability analysis.</p></li><li><p style="min-height:1.5em">Methodology support: provide expert guidance to analog and digital design engineers; troubleshoot tool issues; optimize design methodologies for performance and quality.</p></li><li><p style="min-height:1.5em">Vendor management: serve as the primary technical contact with EDA vendors to resolve complex issues, drive bug fixes, and evaluate new versions/features.</p></li><li><p style="min-height:1.5em">PDK installation & support: contribute to installation, qualification, and deployment of PDKs for advanced technology nodes.</p></li><li><p style="min-height:1.5em">Design enablement: create and maintain clear documentation, training materials, and scripts so teams can use tools and flows effectively.</p></li><li><p style="min-height:1.5em">Continuous improvement: proactively identify bottlenecks and implement solutions that improve productivity, accuracy, and turnaround time.</p></li></ul><p style="min-height:1.5em"><strong>Skills</strong></p><ul style="min-height:1.5em"><li><p style="min-height:1.5em">Strong programming skills: Shell, Python, Perl, Tcl, SKILL; ability to develop simple GUIs; Make-based build automation.</p></li><li><p style="min-height:1.5em">Solid understanding of the full chip-design lifecycle and digital, analog, and mixed‑signal IC design flows.</p></li><li><p style="min-height:1.5em">Strong communication and interpersonal skills; collaborates effectively with engineering teams and vendors.</p></li><li><p style="min-height:1.5em">Excellent problem‑solving skills wi