FPGA Firmware Engineer

<h2>About Singular Photonics:</h2><p>Singular Photonics is a fast-growing fabless semiconductor start-up, developing Single-Photon Avalanche Diode (SPAD) sensors that bring advanced computation directly into imaging. Our sensors enable innovations across LiDAR, fluorescence lifetime imaging (FLIM), spectroscopy and time-resolved optical measurements, powering next-generation solutions for customers worldwide. Based at Orchard Brae House in Edinburgh, we are a close-knit team at the forefront of the photonics revolution.</p><h2>About the Role:</h2><p>We are seeking an FPGA Firmware Engineer to join our multidisciplinary R&D team. This is an FPGA role: you will design, implement and verify the Verilog firmware that powers our SPAD sensors, captures photon timing data at high rates and streams it to the host.</p><p>Our sensors generate data faster than most imaging systems ever see, so the interesting problems here are real ones: clock domain crossing, timing closure and getting data off the device without losing a photon. You will work alongside our hardware, ASIC and software engineers, from architecture through to system bring-up and customer deployment.</p><p>You will report to the Lead Firmware Engineer.</p><h2>Key Responsibilities:</h2><ul><li>Architecture: Define FPGA requirements and architecture for SPAD sensor readout, in discussion with the hardware, ASIC and software teams.</li><li>RTL Design: Implement, verify and debug Verilog modules for data acquisition, photon timing, histogramming and sensor control.</li><li>Verification: Design and run simulations and testbenches, with coverage sufficient to trust the design before it reaches hardware.</li><li>Synthesis & Timing: Own synthesis, constraints, clock domain crossing and timing closure on AMD-Xilinx FPGA family devices in Vivado.</li><li>High-Speed Interfaces: Build and integrate the high-speed interfaces that move sensor data: PCIe, USB3, Ethernet, AXI interface, MIPI, LVDS, SLVS, Camera Link.</li><li>Bring-Up & Debug: Lead firmware bring-up on new boards and sensors, debugging with oscilloscopes, logic analysers and in-system probes.</li><li>Source Control & Build: Keep RTL under version control with a repeatable, automated build, and document designs to the standard our ISO 9001 design control process requires.</li><li>Reviews & Support: Contribute to design reviews, and support the software team and customers during field integration.</li></ul><h2>Experience & Skills:</h2><h3>Essential:</h3><ul><li>Strong proficiency in Verilog, and a solid grounding in RTL design, synthesis and timing closure.</li><li>Hands-on experience with AMD-Xilinx Vivado and its toolchain.</li><li>Experience writing your own testbenches and verifying a design in simulation before hardware.</li><li>Experience bringing up firmware on real hardware and debugging it in the lab.</li><li>Experience with at least one high-speed interface or bus at RTL level.</li><li>Comfortable in a small company where priorities shift and everyone pitches in.</li><li>Working with complex, existing codebases and seamlessly integrating new functionality with minimal disruption.</li></ul><h3>Desirable:</h3><ul><li>SystemVerilog, and verification practices beyond directed testbenches.</li><li>Comfortable working in Linux operating systems.</li><li>Exposure to any of PCIe, AXI interface, USB3, Ethernet, MIPI, LVDS, SLVS or Camera Link.</li><li>C, C++ or Python for embedded software integration and test automation.</li><li>Experience with image sensors, time-of-flight, TDCs or single-photon detection.</li><l