Staff SoC Architect

<div class="text-base my-auto mx-auto pt-12 [--thread-content-margin:var(--thread-content-margin-xs,calc(var(--spacing)*4))] @w-sm/main:[--thread-content-margin:var(--thread-content-margin-sm,calc(var(--spacing)*6))] @w-lg/main:[--thread-content-margin:var(--thread-content-margin-lg,calc(var(--spacing)*16))] px-(--thread-content-margin)"> <div class="[--thread-content-max-width:40rem] @w-lg/main:[--thread-content-max-width:48rem] mx-auto max-w-(--thread-content-max-width) flex-1 group/turn-messages focus-visible:outline-hidden relative flex w-full min-w-0 flex-col" data-conversation-screenshot-content=""> <div class="flex max-w-full flex-col gap-4 grow"> <div class="min-h-8 text-message relative flex w-full flex-col items-end gap-2 text-start break-words whitespace-normal outline-none keyboard-focused:focus-ring [.text-message+&]:mt-1" data-message-author-role="user" data-message-id="3434bb82-2f70-493f-820b-f472f6a2ac87"> <div class="flex w-full flex-col gap-1 empty:hidden items-end rtl:items-start"> <div class="contents max-w-(--user-chat-width,70%)"> <div class="corner-superellipse/0.98 relative min-w-0 overflow-hidden rounded-[22px] px-4 py-2.5 leading-6 user-message-bubble-color max-w-(--user-chat-width,70%)"> <div class="max-w-full min-w-0 [overflow-wrap:anywhere] whitespace-pre-wrap"> <p><strong>Shape the high-speed interfaces and silicon sub-systems behind Graphcore’s next AI acceleration platforms.</strong></p> <p>As a Staff SoC Architect in Bristol, you’ll translate product requirements into specifications for complex, highly integrated, high-performance silicon devices. You’ll own sub-system architecture, modelling, validation and evaluation, connecting early design choices with practical implementation. You’ll help determine how critical components work together, balancing product needs with implementation trade-offs. Those choices will support the specialised compute that lets AI innovators tackle more demanding problems. You’ll assess third-party hard and soft IP, work with vendors and specify how sub-systems integrate across the platform. You’ll also contribute to silicon bring-up, characterisation and evaluation when your expertise is needed.</p> <p>Your contribution won’t stop at a specification document. You’ll deepen your understanding of AI acceleration by seeing how architectural decisions play out in working silicon.</p> <h2>The team and culture</h2> <p>Reporting to the Director of Silicon Architecture, you will be working with processor, SoC and system architects. Silicon design, verification, hardware and software engineers are partners in evaluating options and checking implementation correctness. You’ll represent the team in cross-functional working groups, making trade-offs clear and speaking up when designs need further scrutiny. You’ll help teams move forward by resolving complex bugs and improving engineering processes. Mentoring engineers will let you share your judgement and help others develop theirs.</p> <h2>What we’re looking for</h2> <ul> <li>A degree in Electronic Engineering, Computer Science or a related subject.</li> <li>A solid understanding of computer and SoC architecture.</li> <li>Experience writing clear technical specifications.</li> <li>Knowledge of RTL development and verification processes.</li> <li>The abili